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Tanner EDA to Exhibit at ChipEx 2010, Present on New Approach to Accelerating Analog Layout

MONROVIA, California – April 29, 2010 – Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), will be exhibiting the company’s HiPer Silicon full-flow design suite at ChipEx 2010 in Airport City, Israel on May 4, 2010. In addition, Nicholas Williams, product management director at Tanner EDA, will outline a new approach to accelerating analog layout.


Exhibiting the HiPer Silicon full flow analog design suite, including new v15 functionality and features.

Presenting a paper in Track B: Timing, Clock and Analog entitled “New Approach to Accelerating Analog Layout Surpasses Full Custom and Traditional Automation Methodologies.” This presentation describes how to increase analog layout productivity by accelerating the generation of devices and common analog structures. All cells are generated at a consistently high level of quality. Silicon quality, yield, silicon performance, and matching are as good as the best full custom layout engineer could produce and well above current fully automated layout generation. Design standards are the same for different designers and different projects. Re-targeting to new technology nodes is effortless.


  • Nicholas Williams, Product Management Director, Tanner EDA


  • Exhibition: Tuesday, May 4, 2010 from 9:00am until 4:30pm
  • Presentation:  1:30 pm until 2:00pm, May 4, 2010


Booth #47, ChipEx 2010, AVENUE convention and events center, Airport City, Israel

About Tanner EDA

Tanner EDA provides a complete line of software solutions that catalyze innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs). Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership (TCO). Capability and performance are matched by low support requirements and high support capability as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.


HiPer Verify and HiPer Silicon are trademarks of Tanner Research, Inc.
All other trademarks and trade names are the property of their respective owners.
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Contact for Tanner EDA:
Linda Marchant, Cayenne Communication LLC -- 919-451-0776 This email address is being protected from spambots. You need JavaScript enabled to view it.

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