Tanner EDA to Demonstrate Version 15.11 of Full-flow Analog Design Suite and TowerJazz PDK at ChipEx 2011
What: Demonstrating version 15.11 of the company’s HiPer Silicon full-flow design suite, which gives designers a complete analog design flow from schematic capture, circuit simulation, and waveform probing to physical layout and verification. HiPer Silicon v15.11 contains new features and functionality, including:
- S-Edit Additions
- T-Spice Performance Improvements
- W-Edit Enhancements
- L-Edit Productivity Gains
- HiPer DevGen Additions
- HiPer Verify Enhancements
Where: New Artech Technologies booth, #5, at ChipEx 2011, the annual international event of the Israeli semiconductor industry, at the Hilton convention center in Tel Aviv. This professional industry event is produced by TAPEOUT magazine in cooperation with the GSA (Global Semiconductor Alliance).
About Tanner EDA
Tanner EDA provides a complete line of software solutions that catalyze innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS. Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership (TCO). Capability and performance are matched by low support requirements and high support capability as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.
Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.
HiPer Verify and HiPer Silicon are trademarks of Tanner Research, Inc.
All other trademarks and trade names are the property of their respective owners.