Highlights from the 47th Design Automation Conference (DAC)

June 14 – 17, 2010

It was a busy year at DAC for Tanner EDA, both at the show at large with participation in the Exhibitor and Customer Forums, and at the booth with partner presentations and product demos taking place from opening until closing of the exhibit hall.

HiPer DevGen—Tanner EDA’s new tool for analog IC layout acceleration—was a big hit among current and prospective customers.  They overwhelmingly rated this a real “game-changer” as they learned about the tool and watched it in action.

With v15 of Tanner tools just launched in April, attendees were also keen to learn about what’s new across the entire full-flow suite, including W-Edit, Tanner EDA’s robust waveform analysis platform.

Tanner EDA Leadership Team at DAC

Click to view booth presentations:

Nick Tasker, Sound Design Technologies “Integrated Passives (and 3D design) for SiP and Product Miniaturization”	Mary Ann Maher, SoftMEMS “Single Chip CMOS Integration with a Thermal Accelorometer"	Joerg Doblaski, X-Fab “X-Fab – Tanner Design Kits"	Ofer Tamir, TowerJazz “Tower – Tanner PDK”	Ciaran Whyte, IC Mask “HiPer DevGen: Accelerating Analog IC Layout"

Exhibitor Forums:

Tanner EDA / IC Mask Design Ltd.: High Performance Device and Structure Generation for A/MS Design

Attempts to automate the analog layout process have had limited success. Forgoing full automation, Tanner EDA and IC Mask Design focus on acceleration and semi-automation. We demonstrated that -- without any change to design flow, using only manufacturing design rules -- HiPer DevGen generates high quality design primitives, matched to address common processing artifacts. Results are equal to hand design. Cycle time is dramatically reduced. Users retain control for tuning the design to address specific matching, parasitic and performance requirements.

Speaker: Ciaran Whyte – IC Mask Design Ltd., Limerick, Ireland

Tanner EDA: Challenges and Opportunities Related to PDKs for Analog Design

Process Design Kits (PDKs) are considered an essential enabler to accelerating Analog & Mixed Signal design cycles. Maintaining the integrity of electrical and physical model data across key constituents (foundries, EDA vendors, and designers) requires extensive coordination and ongoing investment.  Recent initiatives within the industry to define PDK standards are aimed at addressing the proliferation of unique PDK support requirements. This panel discussion explored the challenges and opportunities related to PDKs with a focus on Analog Design.

Speakers: Massimo Sivilotti – Tanner EDA, Monrovia, CA; Mark Miller – xFab, Santa Clara, CA; Ori Galzur – TowerJazz, Newport Beach, CA

User Forum:

Driving Analog Innovation

Current and prospective Tanner EDA users joined Greg Lebsack (President) and Mass Sivilotti (CTO) as they shared perspectives on the EDA industry, Tanner's business strategy and product roadmap.
The meeting also included presentations from FLIR and VSemiconductor; current users who shared their experience creating Analog ICs and MEMS with Tanner tools. Attendees learned how Tanner's full-flow product suite is enabling innovations ranging from high-speed I/O devices at deep nanoscale to world-leading image sensors designed for diverse industry applications.

Adam Zeeb of IBM was the lucky attendee who won our Apple iPad raffle!

Click to view customer presentations:

Eric Kurth, FLIR Watch the video on "Choosing and Migrating to Tanner Tools"	Paul Layman, VSemi            “Deep Nanoscale Tape-out on Tanner"