Nano scale design
Nano scale design
by william_Maccolloch » Thu Mar 08, 2012 4:12 pm
Is L-EDIT useful for deep-nanoscale analog CMOS designs?
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Re: Nano scale design
by LannyL » Thu Mar 08, 2012 4:15 pm
In deep-nanoscale CMOS technologies, such as 28nm, conventional device layouts for analog devices are not optimum. The combination of severe metal and VIA EM limits and high device parasitic capacitances forces the layout designer to consider new device geometries. L-EDIT has the capability to capture a range of new device geometries that are not typically found in a layout-tool-specific foundry PDK.
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