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Tanner EDA Releases HiPer Siliconâ„¢ v15.23

Front-end design capabilities bolstered with HiPer Simulationâ„¢ AFS and
enhanced T-Spice

MONROVIA, California – Sept 20, 2012 – Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs) and MEMS devices, has released version 15.23 of their full-flow analog and mixed-signal design suite: HiPer Silicon™.  The addition of HiPer Simulation™ AFS to version 15.23 gives designers added capabilities for front-end design flow, including schematic capture, dual circuit simulators and waveform probing.

HiPer Silicon version 15.23 includes Tanner Analog FastSPICE (T-AFS), which integrates the Berkeley Design Automation Analog FastSPICE™ Platform with Tanner EDA’s S-Edit™ schematic capture and W-Edit™ waveform analyzer. With HiPer Simulation AFS , two Spice simulators deliver the ultimate in performance and productivity, even for large netlists. T-Spice provides fast, accurate analysis while T-AFS delivers accuracy with runtimes 5x to 10x faster than traditional Spice simulators, on a single core. Users can drive the T-AFS simulator directly from S-Edit, getting the speeds and accuracy necessary for nanometer design. Simulation results are displayed automatically in W-Edit for viewing, measuring, and analyzing interactively.

HiPer_Simulation

Figure 1: Tanner EDA’s S-Edit design environment for schematic capture

For additional information on T-AFS or a product datasheet, please see http://www.tannereda.com/tafs . As always, Tanner EDA offers a free 30-day evaluation.

Version 15.23 also adds new TCL commands to S-Edit, supporting greater functionality. And T-Spice now supports the HiSIM-HV model. Integration with Berkeley Design Automation transient noise analysis capability allows users to simulate realistic device noise effects for all circuits, especially non-periodic circuits such as sigma-delta ADCs and frac-N PLLs.

“With the T-AFS capability in version 15.23, Tanner EDA now offers the fastest, most productive and robust front end analog design package on the market,” said John Zuk, vice president of marketing and business strategy at Tanner EDA.  “Users can now verify complex analog and RF circuits with nanometer Spice accuracy while still taking advantage of Tanner EDA’s industry-leading price-performance.”

About Tanner EDA

Tanner EDA provides a complete line of software solutions that drive innovation for the design, layout and verification of analog and mixed-signal (A/MS) integrated circuits (ICs) and MEMS. Customers are creating breakthrough applications in areas such as power management, displays and imaging, automotive, consumer electronics, life sciences, and RF devices. A low learning curve, high interoperability, and a powerful user interface improve design team productivity and enable a low total cost of ownership (TCO). Capability and performance are matched by low support requirements and high support capability as well as an ecosystem of partners that bring advanced capabilities to A/MS designs.

Founded in 1988, Tanner EDA solutions deliver just the right mixture of features, functionality and usability. The company has shipped over 33,000 licenses of its software to more than 5,000 customers in 67 countries.

HiPer Verify, HiPer Silicon, Tanner Tools, L-Edit, S-Edit and W-Edit are trademarks of Tanner Research, Inc. Any other trademarks or trade names mentioned are the property of their respective owners.

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Media Contacts:

Linda Marchant, Cayenne Communication, 919-451-0776, This e-mail address is being protected from spambots. You need JavaScript enabled to view it

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