Tanner EDA Software Tools - Product Information Datasheets for L-Edit, S-Edt, T-Spice, HiPer Verify, HiPer PX, EVI, SDL / SDL Router for Analog IC & Mixed Signal Design
- L-Edit Products (PDF): Physical Layout
L-Edit Physical Layout Tools: Learn more about the features and functions of Tanner Tools L-Edit products that delivers the fastest rendering on the market.
- S-Edit (PDF): Schematic Capture
S-Edit brings the ease-of-use and ease-of-management common to Tanner Tools to the front-end design capture process. Learn how S-Edit can help you optimize your productivity and speed concept to silicon.
- T-Spice (PDF): Circuit Simulation
T-Spice, S-Edit and W-Edit: Learn more about Tanner Tools for schematic capture and simulation.
- T-AFS - Tanner Analog FastSPICE for Circuit Simulation
Learn more about this integrated offering that includesTanner T-Spice and Analog FastSPICE from BDA. Offering users high-performance SPICE simulation and transient noise analysis.
- HiPer VerifyÂ® (PDF): Verification
HiPer Verify: Read about Tanner Tools CalibreÂ®/DraculaÂ® foundry compatible DRC.
- External Verification Interface (PDF): For CalibreÂ® Integration
External Verification Interface (EVI) provides a seamless interface for Tanner customers using Mentor Graphics. CalibreÂ® tool suite to verify their designs. Used in conjunction with Calibre RVE, customers can review Calibre DRC errors, LVS results, and PEX parasitics in L-Edit and S-Edit environments.
- HiPer PXÂ®: For Extraction of Interconnect Parasitics
HiPer PX: Read about 2D and 3D parasitic extraction for accurate modeling of interconnects.
- SDL/SDL Router
Schematic driven layout and auto-router.